Job Description

Company Name:
Power Semiconductors and Applications Center (PowerSAC)

Job Title: Design Engineer (RP2)

Ref. No.: PowerSAC0011

 

As a member of the IC design team, you will contribute to power-management IC development from circuit definition and implementation through integration, silicon validation, and product release.

 

Example application areas: DC–DC converters, LDOs, gate drivers, battery and power-path management, protection, monitoring and sensing, and digitally assisted power management.

 

As a Design Engineer, you will:

  • Contribute to product and block-level specifications, circuit architecture studies, and system-level analysis for power-management ICs.
  • Design and simulate analog, digital, or mixed-signal circuit blocks. Depending on experience, the work may include amplifiers, bias circuits, switches, LDOs, ADCs/DACs, digital control, protection, DFT, and digital interfaces.
  • Perform transistor-level or RTL design and verification using the appropriate simulation, corner-analysis, and sign-off flows.
  • Support mixed-signal block integration and work with analog, digital, and design-verification engineers to meet chip-level requirements.
  • Work with layout engineers on floorplanning, device matching, parasitic review, DRC/LVS closure, and post-layout simulation.
  • Participate in design optimization for performance, power, area, robustness, and manufacturability.
  • Prepare design documentation, present results in design reviews, and track issues to closure.
  • Perform hands-on IC evaluation and debugging in the laboratory, and support characterization and test development.
  • Collaborate with applications, product, test, process/device, packaging, CAD/EDA, and other cross-functional teams.

 

Requirements:

  • Master’s degree (M.Sc., M.Eng., M.A.Sc., or equivalent) in Electrical Engineering, Microelectronics, or a related field, with at least 2 years of relevant work experience.
  • Good fundamentals in at least one of the following areas: analog, digital, or mixed-signal IC design. Candidates should clearly highlight their primary area or areas of specialization in the resume; expertise in all three is not required.
  • Experience with industry-standard EDA tools and design flows: SPICE-based design and verification for analog/mixed-signal candidates, or Verilog/SystemVerilog and digital design/verification for digital candidates.
  • Experience with one or more relevant circuit areas is sufficient; examples include amplifiers, bias circuits, switches, data converters, LDOs, switching-power control, protection, sensing, or digital control and interfaces.
  • Basic understanding of CMOS devices, IC layout effects, and design across process, voltage, and temperature.
  • Familiarity with power-supply control, BCD or high-voltage CMOS, mixed-signal verification, or laboratory characterization is an advantage. Prior IC tape-out experience is preferred but not required.
  • Ability to learn quickly, work carefully with guidance, take ownership of assigned blocks, and collaborate effectively in a multidisciplinary team.
  • Good written and verbal communication skills in English.

 

We welcome candidates whose primary strength is analog, digital, or mixed-signal design. The initial scope will be matched to the candidate’s experience, with mentoring and opportunities to grow toward broader IC ownership.

 

Remuneration and Conditions of Service

Salary is highly competitive and will be commensurate with qualifications and experience. Fringe benefits including annual leave, medical and dental benefits will be provided.

 

Application Procedure

To apply, please send your application with a full curriculum vitae indicating the current and expected salaries to hrpowersac@ust.hk.

 

Review of applications will begin shortly and continue until the position is filled. We thank applicants for their interest but advise that only shortlisted candidates will be notified.

 

(Information provided by applicants will be used for recruitment and other employment-related purposes.)